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Monday, March 27 • 14:30 - 15:10
Alternative Backend Design

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Etherpad

While LLVM has a modern mostly graph-based intermediate language in SSA form, its backend infrastructure relies upon a more classic imperative approach.
In this session, I want to present and discuss a design for backends which heavily uses a single graph-based representation in SSA form.
In this approach, code generation is seen as the process of adding more invariants to this graph, e.g. an instruction schedule and a register assignment, until it is suitable for assembly emission. During the entire process, this representation is invariantly kept in SSA form.
I take a close look at the advantages this property has for the steps in code generation. For example it allows to decouple spilling from register allocation, which mitigates the phase ordering problem of these two steps.
I also examine some typical challenges during code generation, both caused by the chosen program representation and the target machine. This includes SSA reconstruction during spilling as well as live-range splitting and copy coalescing to tackle instructions with constraints on registers.

Speakers

Monday March 27, 2017 14:30 - 15:10
HS001, E1 3

Attendees (17)